1. Field of the Invention
The present invention relates to a nitride semiconductor device.
2. Description of the Related Art
A nitride semiconductor device has been developed. The nitride semiconductor device is generally provided with a nitride semiconductor layer made of nitride based compound, a gate insulating film covering the surface of the nitride semiconductor layer, and a gate electrode disposed on the surface of the gate insulating film.
In the nitride semiconductor device provided with the gate electrode, it is preferable that the nitride semiconductor device has characteristics in which current does not flow through the nitride semiconductor layer in a region facing the gate electrode when a positive voltage is not applied to the gate electrode, whereas the current flows through the nitride semiconductor layer in the region facing the gate electrode when a positive voltage is applied to the gate electrode. Hereinafter, such characteristics will be referred to as normally-off characteristics. On the other hand, characteristics in which the current flows through the nitride semiconductor layer in the region facing the gate electrode even when a gate voltage of 0 volt is applied to the gate electrode, whereas the current does not flow through the nitride semiconductor layer in the region facing the gate electrode when a negative gate voltage below a threshold voltage is applied to the gate electrode will be referred to as normally-on characteristics. In general, it has been considered that normally-off semiconductor devices are easier to use than normally-on semiconductor devices.
As an example of nitride semiconductor devices, a semiconductor device having an insulated gate high electron mobility transistor (HEMT) structure is known. The insulated gate HEMT composed of nitride semiconductor is provided with a nitride semiconductor lower layer, a nitride semiconductor layer stacked on the surface of the nitride semiconductor lower layer, a gate insulating film covering the surface of the nitride semiconductor layer, and a gate electrode disposed on the surface of the gate insulating film. The band gap of the nitride semiconductor layer and the band gap of the nitride semiconductor lower layer are different from each other, and the nitride semiconductor layer is interfaced with the nitride semiconductor lower layer with a heterojunction. On the surface of the nitride semiconductor layer, a pair of electrodes is disposed with an interval therebetween, and the surface of a portion of the nitride semiconductor layer located in the interval between the pair of electrodes is covered with the gate insulating film. Moreover, the gate electrode is disposed in the interval between the pair of electrodes.
When the nitride semiconductor layers of different band gaps are layered with each other with heterojunction therebetween, a two-dimensional electron gas layer (2DEG layer) is formed at the heterojunction interface and thus allowing the current flow thereof. A normal HEMT has the normally-on characteristics in which current flows even when a positive gate voltage is not applied to the gate electrode and the current does not flow when a negative gate voltage below a threshold voltage is applied to the gate electrode.
In a HEMT in which nitride semiconductor layers of different band gaps interfaced with a heterojunction between each other, when the impurity concentration of the nitride semiconductor layer on the upper surface side is lowered and its thickness is made small, a phenomenon in which the 2DEG layer is not formed at the heterojunction interface under normal condition, but is formed by applying a gate voltage to the gate electrode can be obtained. By adjusting the impurity concentration and thickness of the nitride semiconductor layer on the upper surface side, the normally-off characteristics can be developed.
FIG. 4 shows a nitride semiconductor device 62 in related art. The nitride semiconductor device 62 is provided with a substrate 64, a buffer layer 66 stacked on the surface of the substrate 64, a nitride semiconductor lower layer 68 stacked on the surface of the buffer layer 66, and a nitride semiconductor layer 70 stacked on the surface of the nitride semiconductor lower layer 68. The nitride semiconductor layer 70 is composed of an AlGaN layer, the nitride semiconductor lower layer 68 is composed of a GaN layer, and a heterojunction is formed therebetween. The band gap of the nitride semiconductor layer 70 and the band gap of the nitride semiconductor lower layer 68 are different from each other.
On the surface of the nitride semiconductor layer 70, a pair of electrodes 72 and 80 is disposed. The pair of electrodes 72 and 80 is arranged with an interval therebetween, and the surface of a portion of the nitride semiconductor layer 70 which is located in the interval is covered with a gate insulating layer 76. The gate insulating layer 76 is composed of SiO2. On a part of the surface of the gate insulating layer 76, a gate electrode 78 is disposed.
When the impurity concentration and thickness of the nitride semiconductor layer 70 are adjusted, a relationship can be obtained in which the 2DEG layer is not formed at the heterojunction interface between the nitride semiconductor layer 70 and the nitride semiconductor lower layer 68 when a positive gate voltage is not applied to the gate electrode 78, and the 2DEG layer is formed at the heterojunction interface when a positive gate voltage is applied to the gate electrode 78. In fact, the structure shown in FIG. 4 theoretically has a high resistance between the pair of electrodes 72 and 80 while a positive gate voltage is not applied to the gate electrode 78.